2026年11月4日(三) (Wednesday, Nov. 4, 2026) — Day 1

09:20 ~ 09:30 Registration & Exhibition Open
09:30 ~ 10:30 Tutorial (I)
Advanced ESD Basics and CDM Control for 2.5D & 3D IC
Mr. Joshua Yoo
Core Insight, Inc.
Chairman: 趙傳珍
10:30 ~ 10:50 Coffee Break
10:50 ~ 11:50 Tutorial (II)
Transient-Induced Latchup From Measurement to Simulation
Dr. Kateryna Serbulova
imec
Chairman: 吳添立
11:50 ~ 12:50 Lunch
(T-ESDA理監事會、TESDC-2026 TPC Meeting)
12:50 ~ 13:10 T-ESDA 第十三屆第二次會員大會
13:10 ~ 13:20 Coffee Break
13:20 ~ 13:30 TESDC-2026 Opening
13:30 ~ 14:30 Keynote Speech (I)
Whole-Chip ESD Verification Methodology: A Comprehensive Flow
from Floor Planning and Netlist Review to Final Layout Sign-off
蘇金練經理
Diodes Incorporated
Chairman: 黃紹璋
14:30 ~ 14:50 Coffee Break
14:50 ~ 15:50 Invited Talk (I)
IO Design in Advanced Technology
陳國基博士
TSMC
Chairman: 柯明道
15:50 ~ 16:10 Coffee Break
16:10 ~ 17:10 Invited Talk (II)
Challenges and Limitation of AI related 2.5D/3D Heterogeneous Integration, Chiplet and System integration and Enabling Solutions
Mr. Joshua Yoo
Core Insight, Inc.
Chairman: 吳振忠

2026年11月5日(四) (Thursday, Nov. 5, 2026) — Day 2

09:20 ~ 09:30 Registration & Exhibition Open
09:30 ~ 10:30 Invited Talk (III)
Latchup Exploration in Design-Technology and System-Technology Co-Optimization scaling era
Dr. Kateryna Serbulova
imec
Chairman: 吳維旻
10:30 ~ 10:50 Coffee Break
10:50 ~ 11:50 Contributed Paper Session (I)
高速轉阻放大器與旁路電路之射頻與靜電放電協同設計
江承翰、簡爾彣、林群祐
Enhancing Gate ESD Robustness in p-GaN Power HEMTs through Epitaxial Spacer and Field-Plate Engineering
Po-Yen Huang, Haoran Wang, Chun-Hao Lai, Wei-Ting Hsu, Chang-Jui Tu, Xi Jie Lim, Shawn S. H. Hsu, and Roy K. -Y. Wong
ESD HBM Robustness Improvement in GaN-on-Si (MIS)HEMTs by Process Engineering Studies
Chin-Ya Su, Wei-Min Wu, Hao Yu, Marko Simicic, Bertrand Parvais, Chun-Yu Lin, and Patrick Reynaert
Development of a Low-Particle JEDEC Tray Material with Uniform Pocket-Level ESD Protection for Advanced Semiconductor Packaging
Kenny Lo, Alex Wang, Stanley Wang, Richard Chen, Ives Chiu, and Lion Lin
Chairman: 陳東暘
11:50 ~ 12:50 Lunch
12:50 ~ 13:40 Contributed Paper Session (II)
A Simple Design to Enhance the HBM Robustness of P-Type ESD Device under Pin-to-Pin Stress
Jian-Hsing Lee, Chih-Hsuan Lin , Chien-Wei Wang, Ting-Yu Chang, Hsien-Feng Liao, Chih-Jui Lai, Yu-Chen Tai, and Yeh-Ning Jou
使用矽控整流器於跨電源域之靜電放電防護設計
李皓元、梁博惟、林群祐
The Influence of Backend Design on Breakdown Voltage and ESD Robustness in HV ESD Device
Jian-Hsing Lee, Chih-Hsuan Lin, Shih-Chieh Chien, Chih-Jui Lai, Chien-Wei Wang, Yeh-Ning Jou, and Chih-Fang Huang
Chairman: 唐天浩
13:40 ~ 14:00 Coffee Break
14:00 ~ 15:00 Keynote Speech (II)
陳昇祐博士
之光半導體
Chairman: 吳添立
15:00 ~ 15:20 Coffee Break
15:20 ~ 16:20 Invited Talk (IV)
車用半導體可靠度驗證實務
宜特科技
Chairman: 林群祐
16:20 ~ 16:40 Coffee Break
16:40 ~ 17:40 Invited Talk (V)
Automotive Zero-Defect Strategy- From Qualification to OEM Trust
Mr. Calvin Yang
SGS Taiwan
Chairman: 謝哲宏

2026年11月6日(五) (Friday, Nov. 6, 2026) — Day 3

09:20 ~ 09:30 Registration & Exhibition Open
09:30 ~ 10:30 Tutorial (III)
Statistical Inference for Product Reliability---Case studies using R
鄭順林教授
國立成功大學
Chairman: 李名鏞
10:30 ~ 10:50 Coffee Break
10:50 ~ 11:50 Invited Talk (VI)
Reliability by Design- Materials Characterization and Physics-of-Failure Insights for Next-Generation Advanced Packaging
Dr. Chong Leong Gan
Micron Technology
Chairman: 陳始明
11:50 ~ 12:50 Lunch
(TRTA理監事會)
12:50 ~ 13:10 TRTA 會員大會
13:10 ~ 14:10 Invited Talk (VII)
Moxa Reliability Journey
Mr. Steve Wang
Moxa
Chairman: 鄭順林
14:10 ~ 14:30 Coffee Break
14:30 ~ 16:00 Contributed Paper Session (III)
Modelling Degradation Process with Recovery Effects for Highly-Reliable Product and Its Lifetime Estimation
Ming-Yung Lee and Cher Ming Tan
A Cost-Effective Solution for Practical Challenges in Reliability Testing: Capturing the Degrading Behavior of Multiple Samples with Varying Degradation Rates
Debraj Banerjee and Cher Ming Tan
Lifetime Inference for Parallel Lithium-ion Battery Packs
Shuen-Lin Jeng, Hung-Tse Hsu, Cheng-Yu Chao, Hoai-Linh Hoang, Cher-Ming Tan, and Anup Appasaheb Kshirsagar
An Optimized Step-Stress Screening Methodology for Gate Oxide Reliability in SiC Power MOSFETS
Gui-Hong Liu and Tian-Li Wu
介面工程對雙閘極In₂O₃ FeFET快速擦除切換與可靠度特性之影響
張邑安、鄧兆峰、馬誠佑、蘇俊榮
具分離讀寫之雙閘極奈米片鐵電電晶體：雙模式類神經突觸操作
陳靖杰、許恒碩、蘇彬、蘇俊榮
Chairman: 林鴻志

更新日期：2026年10月8日

台灣靜電放電防護工程學會   Taiwan ESD Association.   All Rights Reserved.   2026.