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Other Patents

　

英國(UK)專利
 
1 Ming-Dou Ker, T.-Y. Chen, and C.-Y. Wu, “Substrate-triggering electrostatic discharge protection circuit for deep-submicron integrated circuits,” UK Patent GB 2336241 A, Oct. 13, 1999.
2 Ming-Dou Ker, C.-Y. Wu, C.-C. Huang, C.-N. Wu, and T.-L. Yu, “MOS transistor,” UK Patent GB 2306770 A, May 7, 1997.
3 Ming-Dou Ker, C.-Y. Wu, T. Cheng, C.-N. Wu, and T.-L. Yu, “Capacitor couple electrostatic discharge protection circuit,” UK Patent GB 2304994 A, Mar. 27, 1997.

　

德國(Germany)專利
 
1 Ming-Dou Ker, T.-Y. Chen, and C.-Y. Wu, “Substratgetriggerter schaltkreis zum schutz vor elektrostatischer entladung in integrierten schaltungen im submikrometerbereich,” Germany Patent DE 19818985 A1, Jul. 22, 1999.
2 Ming-Dou Ker and T.-S. Wu, “Chipinterne CMOS-ESD-schutzschaltung mit vier thyristoren mit niederspannungstriggerung,” Germany Patent DE 19518549 A1, Oct. 10, 1996.
3 Ming-Dou Ker and T.-S. Wu, “Latchup-freie, vollständig geschützte, CMOS-chip-interne ESD-schutzschaltung,” Germany Patent DE 19518550 A1, Oct. 10, 1996.
4 Ming-Dou Ker and T.-S. Wu, “CMOS-ausgabepuffer mit verbesserter, hoher ESD-schutzfähigkeit,” Germany Patent DE 19518553 A1, Oct. 10, 1996.
　

荷蘭(Netherlands)專利
 
1 Ming-Dou Ker, T.-Y. Chen, and C.-Y. Wu, “Beveiligingsschakeling tegen elektrostatische ontlading met substraat-triggering voor diep-submicron geïntegreerde schakelingen,” Netherlands Patent NL 1008963 C2, Oct. 25, 1999.
　

日本(Japan)專利
 
1 A. Shih, Ming-Dou Ker, C.-K. Deng, and T.-K. Tseng, “Electrostatic discharge protection element having thick film polycrystalline silicon, electronic device and its manufacturing method,” Japan Patent JP 2004349469 A, Dec. 9, 2004.
2 　 Ming-Dou Ker, T.-S. Wu, and K.-F. Wang, “N-sided polygonal cell layout for multiple cell transistor,” Japan Patent JP 3121618 B2, Jan. 09, 2001.
3 Ming-Dou Ker and T.-S. Wu, “ESD protective circuit with gate coupling SCR structure,” Japan Patent JP 9162303 A, Jun. 20, 1997.
4 Ming-Dou Ker and T.-S. Wu, “CMOS static discharge protective circuit using low-voltage trigger silicon control rectifier,” Japan Patent JP 8288403 A, Nov. 1, 1996.

　

韓國(Korea)專利
 
1 Ming-Dou Ker and W.-Y. Chen, “High-voltage tolerant power-rail ESD clamp circuit,” Korea Patent 10-0852575, Aug. 8, 2008.